Although the concept of microprogramming was developed by Wilkes over twenty years ago, much work continues to be done in order to develop more compact and economical techniques of implementing microprogrammable control logic in a computer. The functions of this control logic may be divided into two broad areas:
A. The control of the functions of the machine in response to a program instruction accessed from main memory, the program instruction being defined as a microinstruction requiring some number of subordinate machine elements (registers, flags, switches, flip-flops, counters, etc.) for its execution, the setting up of the subordinate machine elements being accomplished by a subordinate set of program instructions called microinstructions, which are normally contained in read only memories (ROM) and machine logic.
B. The determination of the sequences of microinstructions required to complete the execution of the macroinstruction referred to above and to return the machine to a state of readiness to receive the next macroinstruction. The latter function is of particular interest because it is typically implemented with branch and default fields in the microinstruction word, and supplemented with hardwired random logic. Alternately, in a vertically microprogrammed machine, in order to effect a branch to the proper next microinstruction word, a special microinstruction word is required, along with an additional machine cycle.
What is desired, therefore, is a fast and economical technique by which the appropriate next operation phase of the machine may be determined. This technique should require minimal additional bits in the microinstruction word, minimal additional random logic, and no additional machine cycles. Furthermore, the machine cycle should not need to be slowed by the implementation of this technique.
One example of the state of the art in microprogram controlled processors is the data processor disclosed in U.S. Pat. No. 3,859,636, entitled "Microprogram Controlled Data Processor For Executing Microprogram Instructions from Microprogram Memory Or Main Memory", by R. W. Cook. In the data processor disclosed in that patent the words stored in the microprogram memory each comprise an instruction portion and a next microprogram instruction word address portion. The words obtained from the microprogram memory are stored in a microprogram instruction register. The next microprogram instruction word address portion of a microprogram memory word stored in the instruction register is gated to another register to fetch the next microprogram instruction word of the sequence from the microprogram memory. The instruction portion of a microprogram memory word stored in the instruction register is decoded by a microprogram decoder, which decoder generates control signals for performing the desired processing action.
Applicants' data processor controller differs from the above prior art processor in that the address of the next micro-instruction is determined simultaneously with the execution of the present micro-instruction. Further, the prior art processor addresses only fixed, predetermined sequences of microinstructions, whereas applicants' controller selectively generates the sequences of micro-instructions by generating said address of the next micro-instruction in accordance with a combination of inputs derived from the present machine state and a program instruction contained in main memory.